Given chip technology's potential to revolutionize countless fields, recognizing the contributions of leading scholars in this domain is critical. One such individual making strides in advancing our capabilities within this field is the David and Marilyn Karlgaard Professor of Electrical and Computer Engineering and IEEE Fellow Ahmed Louri. In a testament to his constant innovation and profound impact on the field of computing, he was honored with the prestigious IEEE Computer Society (CS) Golden Core Award and obtained a patent for a novel fault-tolerant scheme for artificial intelligence (AI) and machine learning (ML) architectures implementing them both.
IEEE Transactions on Computers (TC), the flagship journal of IEEE CS launched in 1969, is renowned for publishing research and disseminating cutting-edge findings that shape the future of computing systems. Under Louri’s two-term (5 years) Editor-in-Chief tenure, this journal saw a marked improvement in major submissions, downloads, and overall reachability, notably in AI and ML design. TC is currently ranked the highest for computer hardware design by Google Scholar, and its Impact Factor is the highest it has ever been among its designated competitors.
The Golden Core Award recognizes significant contributors like Louri, who have volunteered their time and advanced the Society’s success; he joins 17 others being added to the permanent roster of Golden Core recipients since 1996.
“It gives me great satisfaction to have made a significant difference to the research community and society through this contribution. It is gratifying to receive it and be among these select members since not everybody receives this award,” said Louri.
Complementing this acknowledgment is his groundbreaking work on a fault-tolerant scheme for on-chip communication systems for AI and ML architectures. Louri’s current research focuses on designing next-generation computing architectures that are smaller, faster, more powerful, scalable, sustainable, and more robust with application to many societal needs; this patent represents a continuation of his efforts in the context of AI and ML.
At its core, the patented technology introduces an innovative approach to optimizing AI and ML computing architectures. Louri noted that his technique marks a departure from classical fault-tolerant methods, which heavily rely on redundancy–meaning they duplicate computing resources to achieve some level of fault tolerance in the computing system. Duplication of resources adds to costs and other issues in the overall design. The novelty of his technique stems from the decrease in resource consumption to perform computations compared to the classical approach.
The framework described in Louri’s patent, “Learning-Based High-Performance, Energy-Efficient, Fault-Tolerant On-Chip Communication Design Framework (Patent Number: 12,040,897),” ensures computing architectures are not only functional but also incredibly reliable, guaranteeing these systems can still deliver accurate results, even when faced with internal errors or disruptions. The design framework efficiently tackles all fault mechanisms in hardware architectures by intelligently selecting the optimized hardware configurations and fault management strategies that can simultaneously improve performance, energy efficiency, and reliability. The key innovations are scalable and can be implemented in nearly any current and future AI-enable computing system, including mobile devices, Internet of Things (IoT), multicore processors, embedded systems, servers, cloud computing, data centers, ML accelerators, and many others.
Achieving fault tolerance and robustness is critical in a world increasingly reliant on AI and ML applications. From enhancing the reliability of recommender systems to ensuring the precision of identification systems in defense applications to securely implementing autonomous systems, this technique is set to revolutionize how AI and ML systems are structured. “After successfully solving a problem of a certain size, you want to solve even larger problems. As the AI model sizes and problem sizes increase, one must deploy more computing resources, which means more potential for errors and things going wrong; therefore, our technique will be deployed more often,” Louri said.
While the Golden Core Award celebrates Louri’s contributions to IEEE CS, his patent exemplifies the quality of his innovative research program, which stretches the boundaries of technology to enhance the resiliency, efficiency, and sustainability of modern computing architectures. Louri’s dual accomplishments illustrate how his past and present efforts are shaping the future of computing through a blend of esteemed leadership, world recognition, and cutting-edge research.